We are currently looking for a ASIC designer to help our customer in the telecom sector. You will be involved in new and existing ASIC projects working in teams.
Requirements
- You have a solid background with experience of ASIC development.
- Used to work with complex ASIC and/or large FPGA design.
- Multi clock domains.
- System Verilog.
- Good English skills, in both speech and writing.
- For the integration role a good experience and interest in Spyglass and Synthesis is needed.
Desired Skills
- Experience of systemization and architecture design.
- Backend work with timing constraints, timing optimization and formal verification.
- UVM verification.
- Scripting skills.
- Telecom.
